Make object files

The command must be preceded by a tab NOT spaces. When make is asked to evaluate a rule, it begins by finding the files in the prerequisites. If any of the prerequisites has an associated rule, make attempts to update those first. In the above example, the rule " all " has a pre-requisite " hello.

The rule " hello. Again, it does not exist, so make looks for a rule to create it. It runs the command " gcc -c hello. Finally, the rule " all " does nothing.

More importantly, if the pre-requisite is not newer than than target, the command will not be run. In other words, the command will be run only if the target is out-dated compared with its pre-requisite. For example, if we re-run the make command:. You can also specify the target to be made in the make command.

For example, the target " clean " removes the " hello. You can then run the make without target, which is the same as " make all ". A comment begins with a and lasts till the end of the line. The rules are usually organized in such as way the more general rules come first. The overall rule is often name " all ", which is the default target for make. A target that does not represent a file is called a phony target.

For example, the " clean " in the above example, which is just a label for a command. If the target is a file, it will be checked against its pre-requisite for out-of-date-ness. Phony target is always out-of-date and its command will be run. The standard phony targets are: all , clean , install. Single character variables do not need the parentheses.

You can also use vpath lowercase to be more precise about the file type and its search directory. Make comes with a huge set of implicit pattern rules. You can list all the rule via --print-data-base option.

Make is actually quite complex, and can be considered as a programming language by itself!! GNU Make: an automation tool for compiling and building applications. GNU Binutils: a suite of binary utility tools, including linker and assembler. GNU Bison: a parser generator similar to lex and yacc. Cygwin is huge and includes most of the Unix tools and utilities. It also included the commonly-used Bash shell. If the target is native Windows, the code can be distributed and run under Windows.

However, if the target is Cygwin, to distribute, you need to distribute Cygwin runtime environment cygwin1. This is because Cygwin is a Unix emulator under Windows.

The executable is " iwmingwgcc ". Thread model: posix gcc version 6. You probably should install these two packages too. However, to distribute the code produced, you need to distribute Cygwin Runtime Environment cygwin1. Reading man pages under CMD or Bash shell can be difficult. Hence, you need to include the current path. You also need to include the file extension, if any, i. In Unixes, the output file could be " a. Furthermore, you need to assign executable file-mode x to the executable file " a.

Compile and Link Separately The above command compile the source file into object file and link with other object files and system libraries into executable in one step. By default, the object file has the same name as the source file with extension of ".

The programmer can read and understand the source code, but the CPU does not understand it. Therefore, it is necessary to convert the source code into a machine-understandable format. An object code is generated after compiling the source code. Object file is another name for object code. The object file has the. Moreover, the object file has the. However, the CPU cannot directly execute the object file. After writing the C program, if there are any syntax errors, the programmer should edit them.

However, if there are no syntax errors, the compiler converts the source code into an object file. Then the linker performs the linking process. It takes one or more object files generated by the compiler and combines them into a single executable file. Furthermore, it links the other program files and functions the program requires. Our game is made up of the following source and header files:. To build this program we would first have to run the compiler on each source file, generating a corresponding object code file:.

Then, we would have to feed all the object files to the linker possibly still using the C compiler front-end for convenience , instructing it to link all the libraries we need as well:. Obviously, such tediousness could be automated with a shell script.

However, that would be a grossly sub-optimal solution, as it would recompile all source files from scratch, every time we try to build with it. Make is a much more elegant solution to our building problems. We create a file named Makefile , which contains a set of rules describing build products, their dependencies, and which commands are needed to build them.

Then when we ask make to build our program binary, it recursively traverses the dependency graph to figure out which parts need to be re-created, based on the last-modified timestamps of the target file, and its dependency files. Warning: do not run away terrified by the first makefile example. It's only meant to illustrate how make works, so it's needlessly verbose.

Back to our game example, the binary mygame , obviously depends on main. So, let's define two make rules for creating these two files:. Essentially for each rule, the part before the colon is the filename we want to build when this rule is executed, the part after the colon is the list of dependencies, i. And finally, in subsequent lines, we just type the commands needed to make this happen. Note that each line in the commands part of a rule needs to begin with a leading tab.

Spaces will not work, it really has to be a tab character, so pay extra attention to your text editor settings, about how it treats any tabs you enter. So, if we modify main. In order to build it, make will have to use the declared dependency files, so it will execute each rule corresponding to those files in turn, starting from main.

To build main. Similarly, returning to the initial rule, since now main. Obviously, having to type rules for each of our source files is tedious, and thankfully unnecessary. Make actually knows how to create object code from C source files, so we can skip the object file rules, and also provides some handy variables for referring to the target or dependency files in rule commands without having to re-type everything. So here is a slightly simpler makefile for the same task:.

We substitute the value of any variable built-in or not by prepending a dollar sign to its name. However, one peculiarity of the make syntax, as opposed to say the bourne shell syntax, is that only the first character following the dollar sign is considered to be the variable name. If we want to use longer names, we have to parenthesize the name before applying the dollar sign to extract its value. There's one last thing bugging me in the last example. I hate having to type manually the list of object files needed to build the program.

Thankfully it turns out we don't need to do that either. See the following example:. The first line of this example collects all source files in the current directory in the src variable. Then, the second line transforms the contents of the src variable, changing all file suffixes from.

Finally, I added a new rule for cleaning up every target, in order to rebuild the whole program from scratch.